Boost Converter


When I design a field instrument, I need to consider the power supply as well … actually the power supply needs to be considered an integral part of the system, not simply a matter of “VDD goes here, GND goes there”.

So this led to a few years spending my time developing switching regulators for a couple of major semiconductor companies and start-ups in San Jose. I don’t like using switching regulators with precision measurement instruments … but sometimes that’s the way it goes – and they can/should be used as “pre-regulators”.

So I can drop the battery voltage down with a buck converter; sometimes I bump it up with a boost converter. Sometimes the situation calls for SEPIC converter. In any case, power in is not quite power out. A linear regulator – while “cleaner” than a switcher – is not power efficient. One method to cut power losses is the switching regulator.

So … the topic gets complex enough to justify a textbook length article – I’m only going to talk about a basic boost converter.

The basic concept may be explained with the following network:

When the switch is closed, current flows through the inductor, charging the magnetic field. The diode is reverse biased (Vin < (Vout + VD) so the output is effectively disconnected from the input.

When the switch opens, the magnetic energy stored in the inductor is now released through the diode to the capacitor and load.

Both the load current and voltage have ripple components – ripple is necessary for the operation of the network – and a detriment for quiet systems.
 

Ideally, the boost converter provides an output of:

    \[V_{\text{out}} \; = \; \frac{ \; V_{\text{in}} \; }{ \; 1 \, - \, D \;} \; \; \Rightarrow \; \; D \; = \; 1\,- \,\frac{ \; V_{\text{in}} \; }{ \; V_{\text{out}} \; }\]


The duty cycle is defined by the ratio of V_{\text{in}} to V_{\text{out}}

(I don’t understand some people; I’ve had design requests from those who thought duty-cycle is independent of input/output voltages)

The following relationship exists between D and V_{\text{out}} for V_{\text{in}} = 1:

A 5V input is common …

The shape of the response remains the same as expected. It should be obvious that duty cycles above 0.8 or so may lead to control issues. A 12V output requires a duty-cycle of 0.58. The design process allows for some variation …

We know “ideal” doesn’t cut it … if nothing else, I’ll have finite losses in the switch and diode. The switch will likely be a MOS device and the voltage drop between source and drain may be lower than 0.2 V; the diode will likely be a Schottky device with a drop of about 0.3 V. The diode should be a fast-recovery device.
 

So, some basic expressions to start:

    \[I \; = \; \frac{1}{\, L \, } \, \int\limits_0^t V \, dt \; + \; I_o \qquad \qquad V \; = \; L \, \frac{di}{\, dt \, }\]

For rectangular pulse of width t:

    \[I_{\textpk}} \; = \; t \, \frac{V}{\, L \, } \; + \; I_o\]


The current is a ramp of slope V/L such that:

    \[V \; = \; L \, \frac{ \, \Delta \text{I} \,}{\, \Delta \text{T}_{\text{ON}}}}\]

During the ON period:

    \[I_{\text{pk}} \; = \; T_{\text{ON}} \, \frac{\; V_{\text{in}} \, - \, V_{\text{SW}} \;}{\, L \, } \; + \; I_o \; \; \Rightarrow \; \; \Delta I_{\text{ON}} \; = \; T_{\text{ON}} \, \frac{\; V_{\text{in}} \, - \, V_{\text{SW}} \;}{\, L \, }\]

During the OFF period:

    \[I_{\text{OFF}} \; = \; I_{\text{pk}} \, - \, T_{\text{OFF}} \, \frac{\; V_{\text{out}} \, - \, V_{\text{in}} \, + \, V_{\text{D}} \;}{\, L \, } \; \; \Rightarrow \; \; \Delta I_{\text{OFF}} \; = \; T_{\text{OFF}} \, \frac{\; V_{\text{out}} \, - \, V_{\text{in}} \, + \, V_{\text{D}} \;}{\, L \, }\]

In steady-state, \Delta I_{\text{ON}} = \Delta I_{\text{OFF}}. Equating ripple current terms:

    \[\Delta I_{\text{ON}} \; = \; \Delta I_{\text{OFF}} \; = \; \Delta I \; = \; T_{\text{OFF}} \, \frac{\; V_{\text{out}} \, - \, V_{\text{in}} \, + \, V_{\text{D}} \;}{\, L \, } \; = \; T_{\text{ON}} \, \frac{\; V_{\text{in}} \, - \, V_{\text{SW}} \;}{\, L \, }\]


Re-arranging terms:

    \[V_{\text{in}} \, T_{\text{ON}} \, - \, V_{\text{SW}} \, T_{\text{ON}} \; = \; V_{\text{out}} \, T_{\text{OFF}} \, - \, V_{\text{in}} \, T_{\text{OFF}} \, + \, V_{\text{SW}} \, T_{\text{OFF}}\]


    \[V_{\text{out}} \; = \; \frac{ \; T_{\text{OFF}} \, (V_{\text{in}} \, - \, V_{\text{D}}) \, + \, T_{\text{ON}} \, (V_{\text{in}} \, - \, V_{\text{SW}}) \;}{T_{\text{OFF}}}\]

Noting that \text{DC} = \text{T}_{\text{ON}}/\text{T} and \text{T}_{\text{OFF}}/\text{T} = \text{T(1 - DC)}:

    \[V_{\text{out}} \; = \; \frac{ \; V_{\text{D}} \, - \, V_{\text{in}} \, - \, DC \, (V_{\text{D}} \, - \, V_{\text{SW}}) \;}{DC \, - \, 1}\]


gives the result:

    \[V_{\text{out}} \; = \; \frac{ \; V_{\text{in}} \, - \, D \, V_{\text{SW}} \;}{1 \, - \, D} \, - \, V_D\]

For the Vout = 12V example, assume the diode drop is 0.3V and switch drop 0.2V. The actual output voltage becomes:

    \[V_{\text{out}} \; = \; \frac{ 5 \, - \, 0.58 \, \times \,0.2 \;}{1 \, - \, 0.58} \, - \, 0.3 \; = \; 11.33\]

The duty cycle would need to be bumped up to 0.60 to account for diode and switching losses.

The output ripple voltage is partially defined by the equivalent series resistance (ESR) of the output capacitor:

    \[\Delta \text{V} \; = \; \text{ESR} \, \left( \, \frac{\text{I}}{\, 1 \, - \, D \, } \, + \, \frac{\, \Delta \text{I} \, }{2} \, \right)\]

The duty-cycle is still expressed in terms of voltages:

    \[\text{DC} \; = \; \frac{ V_{\text{D}} \, - \, V_{\text{in}} \, + \, V_{\text{out}}}{ \; V_{\text{D}} \, - \, V_{\text{SW}} \, + \, V_{\text{out}} \; }\]

The output voltage is non-linearly related to the duty cycle. There is an increasing sensitivity to duty-cycle as the boost ratio increases. This may decrease regulation if variations of the duty-cycle become significant.

This is all well and good but the question remains about component values; the inductor being most critical. Since the input and output voltages as well as load current are usually mandated by the project requirements, the allowable degree of ripple current is the only free parameter; the inductor value is constrained by these other parameters. Small ripple requires a large inductance; a smaller inductance results in increased ripple. Large ripple increases the peak current … which increases stress on the switch and requires an inductor with a larger saturation capability. The inductor needs sufficient rating to handle both the resulting rms and saturation currents.

This circuit operates most efficiently with fixed or minimally varying loads. It also requires a “minimum” load. If the load becomes light enough, the circuit enters a “discontinuous-mode” where the inductor becomes fully discharged. When the load increases, the inductor needs to recharge which temporarily upsets network stability.

Should this be the situation, the inductor should be sized such that the ripple current is at least twice the minimum load current. This will assure continuous-mode operation under all loads.

The minimum inductance value can be selected as:

    \[\text{L} \; = \; \frac{ \; ( \, V_{\text{out}} \, + \, V_{\text{D}} \, - \, V_{\text{in}}) \, ( 1 \, - \, DC ) \; }{\text{I}_{\text{load,min}} \, f}\]

For example, for a 5V input and 12V output, the duty cycle would be 1 \, - \, \frac{\oldstylenums{5}}{ \, \oldstylenums{12} \, } \; = \; \oldstylenums{0.583}. With a load current of 50 mA, a clock frequency of 100 kHz, and an assumed diode voltage drop of 0.4 V, the minimum inductance would be 617 \muH.

At this low a current level, it may be beneficial to raise the clock frequency … physical inductors are awkward, usually not able to be integrated on a die at these frequencies, and can get physically large for low frequency, high current applications. The usual procedure would be to “get close” in design values, then find a feasible component and adjust the frequency – available inductors don’t have the variety that capacitors and resistors do … and you really would prefer to not be in a position where you need to wind your own.

(Though – if need be … I have a custom-wound toroid sample laying around that didn’t quite work out.)

The inductor value is found to be:

    \[\text{L} \; = \; \frac{ \; ( \oldstylenums{12} \, + \, \oldstylenums{0.5} \, - \, \oldstylenums{5} ) \, ( 1 \, - \, \oldstylenums{0.583} ) \; }{\oldstylenums{0.05} \, \times \, \oldstylenums{100} \, \text{kHz}} \; = \; \oldstylenums{626} \; \mu \text{H}\]

The ripple current is:

    \[\Delta \text{I} \; = \; T_{\text{ON}} \, \frac{\; V_{\text{in}} \, - \, V_{\text{SW}} \;}{\, L \, } \; \; \Rightarrow \; \; \oldstylenums{5.83} \, \mu \text{s}} \, \frac{\; \oldstylenums{5} \, - \, \oldstylenums{0.5} \;}{\, \oldstylenums{626} \; \mu \text{H} \, } \; = \; \oldstylenums{42} \; \text{mA}\]

An ESR value of 150 mΩ is not unreasonable for this type of capacitor:

    \[\Delta \text{V} \; = \; \oldstylenums{0.15} \, \left( \, \frac{\oldstylenums{0.05}}{\, \oldstylenums{1} \, - \, \oldstylenums{5.83} \, } \, + \, \frac{\, \oldstylenums{0.042} \, }{2} \, \right) \; = \; \oldstylenums{22} \; \text{mV}\]

From which the necessary capacitance is determined:

    \[\text{C} \; = \; \frac{\text{I} \, \text{DC}}{\, f \, \Delta \text{V} \, } \; = \; \frac{\oldstylenums{0.05} \times \oldstylenums{5.83}}{\, \oldstylenums{100} \, \text{kHz} \times \oldstylenums{22} \; \text{mV} \, } \; = \; \oldstylenums{13} \; \mu\text{F}\]

I plopped some parts and numbers together in a simulation circuit. I used a 2N7002 NMOS for the switch and a BAT54 Schottky diode. A 240 Ω resistor is appropriate for 12V and 50 mA. The switching clock period was 10 μs and the ON time was 5.83 μs. The steady- state results are shown below.

Top trace (CYN) is load current. Average and rms values are both 46.2 mA [50 mA]
2nd trace down (MAG) is diode voltage. Forward voltage is 548 mV [500 mV]
Middle trace (GRN) is inductor/switch node. Minimum voltage is 241 mV [0]
RED trace is control voltage as defined. Shown as reference.
Bottom trace (BLU) is output voltage. Average and rms values are both 11.1 V [12 V]

Not too bad for a quicky put-together. The output voltage is a bit low but the diode loss was a snidge higher than expected and the MOS ON voltage was not taken into account. A bit of undesired spiking at the transitions but I used unrealistic control rise and fall times. A bit more effort and selection of parts would refine this circuit to the operation desired.

Feedback is normally applied to the CLK generator but that’s a topic for a different time.

That’s good for now …

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